Stage 1 (gains)
research_required
Stage 1 (prix indicatif)
research_required
Temps d'intervention
research_required
Outils nécessaires
research_required
Architecture
Tricore/SPC Power Architecture class
Microcontroller (MCU)
TC1767
Mémoire / Flash
2MB internal flash
Protocole de communication
BENCH
Cadre légal
FR/DE/CH/EU: road use may be illegal if emissions/noise/type-approval affected; track/export disclaimer required; verify local law