Üretici
Continental Siemens
Aile
Continental/SIEMENS SIM2K
Stage 1 (gains)
research_required
Stage 1 (prix indicatif)
research_required
Temps d'intervention
research_required
Outils nécessaires
research_required
Architecture
TriCore/AURIX
Mikrodenetleyici (MCU)
TC1782
Mémoire / Flash
2.5MB internal flash
Lecture / écriture possible
BSL open required; OBD/bench no open
Protocole de communication
OBD; Bench; BSL
Sécurité / protection
FullFlash/CAL+SW/CVN/checksum by BitBox
Cadre légal
FR/DE/CH/EU: road use may be illegal if emissions/noise/type-approval affected; track/export disclaimer required; verify local law