Stage 1 (gains)
research_required
Stage 1 (prix indicatif)
research_required
Temps d'intervention
research_required
Outils nécessaires
research_required
Architecture
Tricore/SPC Power Architecture class
Microcontrôleur (MCU)
TC1796
Mémoire / Flash
2MB internal flash
Lecture / écriture possible
boot requires opening; bench usually no open if supported
Sécurité / protection
TPROT/OTP/checksum; cloning risk if OTP not handled
Cadre légal
FR/DE/CH/EU: road use may be illegal if emissions/noise/type-approval affected; track/export disclaimer required; verify local law